-- %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
-- %                                                      %
-- %         This is a VHDL Source for Test Program       %
-- %          (16bit adder for sample program)            %
-- %                                                      %
-- %             1997.6.20   by Tohru Ishihara            %
-- %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

-------------------------------------------
--      Making User define variable      -- 
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-- Prompt
set PROMPT ^$file->^
trace -waves /alu_frame/ob_p /alu_frame/flag_p /alu_frame/aluo_p /alu_frame/dbi_p
-- monitor event /add_sim/sum_top /add_sim/co_top
run