LIBRARY IEEE;
USE IEEE.std_logic_1164.all;
USE WORK.pkg_kue2.all;

ENTITY sel8 IS 
   PORT (a  : IN  logic8;
         b  : IN  logic8;
         sl : IN  std_logic;
         st : IN  std_logic;
         y  : OUT logic8);
END sel8;

ARCHITECTURE sel_body OF sel8 IS
BEGIN
   PROCESS (sl,st,a,b)
   BEGIN
      IF (st = '1') THEN
         y <= "00000000";
      ELSIF (sl = '0') THEN
         y <= a;
      ELSE
         y <= b;
      END IF;
   END PROCESS;
END sel_body;