Nationwide VDEC Activities


1. Mailing list of CAD tool users

A mailing list is available to all CAD tools users for communicating with each other. Lively discussions on settings, usage and skills give novices a rapid startup to use the most popular and up-to-date VLSI design tools.

2. Mailing list of chip designers

Latest technology information, including tips for VLSI design and specific design libraries for universities, is supplied to designers in mailing lists for different chip fabrication technologies. Users exchange their experience and tips to solve problems during the design.

3. Cooperation among universities

Besides in the University of Tokyo, VDEC has established branches in other 9 universities all over Japan to provide CAD software licenses to their nearby users effectively. Various kinds of support, such as measurements and evaluations on fabricated chips, holding seminars on CAD tools and design libraries, are also cooperated by these universities actively.

4. Annually held LSI designers' forum

Each year, a symposium called VDEC Designers' Forum is held in some local university. Young VLSI researchers and designers from universities gathered to communicate their ideas and thoughts on LSI design and education with each other freely at this forum.