| 13:00 | Opening Remark |
| 13:10 | Invited Talk (1) |
| Built-In Soft Error Resilience for Robust System Design Subhasish Mitra (Stanford University) |
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| High Quality Delay Testing for Logic Circuits Seiji Kajihara (Kyusyu Institute of Technology) |
|
| The Quest for Wireless Testing and the HOY System Cheng-Wen Wu (SOC Technology Center, ITRI) |
|
| 14:40 | Break |
| 15:00 | Invited Talk (2) and Activity Report of D2T Group |
| A Test Solution for Low Power Design Takashi Aikyo (STARC) |
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| Test and Reliability of Nanoscale Electronic Systems: Next-Generation Solutions
for Next-Generation Bernd Becker (University of Freiburg) |
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| Activities of Advantest D2T Research Division in VDEC Satoshi Komatsu (University of Tokyo) |
|
| 16:30 | Break |
| 16:50 | Research Report of VDEC D2T Group |
| Pseudo-Functional Testing for Reducing Test Overkill and Escape Tim Cheng (University of Tokyo / University of California, Santa Barbara) |
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| Challenge for Improvement of Test Coverage in Deep Submicron LSI Yasuo Furukawa (Advantest Corporation) |
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| Targeting Leakage Constraints during ATPG - and Some Remarks on the Collaboration between Bremen and Tokyo - Goerschwin Fey (Bremen University / University of Tokyo) |
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| 18:20 | Closing Remark |
| 18:30 | Banquet |
VLSI Design and Education Center (VDEC), The University of Tokyo