10:00 |
Opening Remark |
10:10 |
Introduction of VDEC D2T Group |
10:20 |
Invited Talks (1) |
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Test's Changing Role in the Late-Silicon Era
Tim Cheng (University of California, Santa Barbara) |
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IFRA: Instruction Footprint Recording and Analysis for Post-Silicon Validation of Robust Systems
Subhasish Mitra (Stanford University) |
11:50 |
Lunch |
13:00 |
Invited Talks (2) |
|
Testing of 3D Integrated Circuits: Challenges and Emerging Solutions
Krishnendu Chakrabarty (Duke University) |
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Issues and Challenges of Analog Circuit Testing in Mixed-Signal SOC
Haruo Kobayashi (Gunma University) |
14:30 |
Break |
15:00 |
Research Report of VDEC D2T Group |
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A Characteristic Function Based Method for Identifying a Deterministic Jitter Model in a Total Jitter Distribution
Takahiro Yamaguchi (Advantest Corporation) |
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Signature-Based Testing for Adaptive Mixed-Signal Systems
Mohamed Abbas (University of Tokyo) |
16:00 |
Break |
16:30 |
Invited Talks (3) |
|
Manufacturing Test of Nanometer Integrated Circuits
Shawn Blanton (Carnegie Mellon University) |
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On Compositional Observational Equivalence Checking of Hardware
Zurab Khasidashvili (Intel Haifa) |
18:00 |
Banquet |