10:00 | Opening Remark |
10:05 | Address from the Executive Vice President of The University of Tokyo Sadanori Okamura, Executive Vice President |
10:15 | Address from the President of Advantest Corporation Toshio Maruyama, President and CEO of ADVANTEST Corporation |
10:25 | Address from the Director of VDEC Kunihiro Asada, Director of VLSI Design and Education Center, The University of Tokyo |
10:35 | Invited Talks(1) |
Digitally-Assisted Analog Testing for Mixed-Signal SoC Professor Kwang-Ting Cheng (University of California, Santa Barbara / University of Tokyo) |
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A Theoretical Approach to the Research on ATPG and DFT Professor Hideo Fujiwara (Nara Institute of Science and Technology) |
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11:55 | Lunch |
14:00 | Invited Talks(2) |
Synergy between Manufacturing Test, Silicon Validation / Debug and Fault
Tolerance Mr. Rajesh Galivanche (Intel Corporation) |
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Gradual and Steady Change on Logic Testing Dr. Yasuo Sato (Hitachi, Ltd.) |
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Test Pattern Generation using Boolean Proof Engines Professor Rolf Drechsler (Bremen University) |
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Toward Unification of Testing and Verification of VLSI Professor Masahiro Fujita (University of Tokyo) |
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16:10 | Coffee Break |
16:40 | Invited Talk(3) |
Automated Debugging from Design to Silicon: Advances, Perspectives and
Solutions Professor Andreas Veneris (University of Toronto) |
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Correctness of Unreliable Systems? A Basis for Formal Robustness Checking Professor Goerschwin Fey (University of Tokyo, Bremen University) |
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VLSI Design and Test Education in VDEC Professor Satoshi Komatsu (University of Tokyo) |
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18:10 | Closing Remark |
18:15 | Banquet |
VLSI Design and Education Center (VDEC), The University of Tokyo