VDEC D2T Symposium 2012

February 10th (Fri.), 2012. 10:00-17:00
Takeda-Hall, 5th floor of Takeda Building, The University of Tokyo

Symposium Program

10:00 Opening
10:15 Introduction of VDEC D2T Group
Recent Activities of D2T Research Division
Satoshi Komatsu (University of Tokyo)
10:30 Session 1
3D TSV Test: Myths, Challenges, and Solutions
Erik H. Volkerink (Verigy US Inc. _ Advantest Group)
Application of a Continuous-Time Level Crossing Quantization Method for Timing Noise Measurements
Takahiro Yamaguchi (Advantest Laboratories)
11:50 Lunch
13:00 Session 2
Electron beam lithography: history, issues, and challenges
Masaki Yamabe (Fujitsu Semiconductor Ltd.)
EB Direct Writing Technology for Device Production with Character Projection Function
Takashi Maruyama (e-Shuttle Inc.)
Nanotechnet club: Ultra-short turn-around-time MEMS Research by EB Direct Writing Environment in Takeda Cleanroom
Yoshio Mita (University of Tokyo)
15:00 Break
15:30 Session 3
High-speed digital I/O characterization with ATE: is there a future?
Jose-Antonio Moreira (Verigy, Advantest Group)
Real-Time Testing Method for High-Speed Multi-Level Signal Interface
Masahiro Ishida (Advantest)
16:50 Closing
17:00 Reception

VLSI Design and Education Center (VDEC), The University of Tokyo