The 11th VDEC D2T Symposium, The University of Tokyo

September 21st (Wed.), 2016
Takeda Hall, 5th floor of Takeda Building, The University of Tokyo

(日本語版, Japanese page)


News:

- Symposium homepage was opened. (2016/6/22)
- Registration started. (2016/7/11)
- Presentation abstracts are linked. (2016/8/26)


Symposium Overview

Organizer VLSI Design and Education Center (VDEC), The University of Tokyo
Sponsor ADVANTEST Corporation
Supporters The Institute of Electronics, Information and Communication Engineers (IEICE)
Information Processing Society of japan (IPSJ)
IEEE SSCS Japan Chapter
The Study Group of the integrated MEMS, JSAP
The Institute of NANO Testing (INANOT)
Japan Electronics and Information Technology Industries Association (JEITA)
Semiconducto Equipment Association in Japan (SEAJ)
SEMI Japan
Power Device Enabling Association (PDEA)
Admission fee Not required

From the organizer:

"D2T Symposium" will be held on 21st September, 2016, as 11th meeting of symposium series first started in 2008. We have been pursuing in "design", "test", and their bridging technologies in the symposia as indicated in the name "D2T" that means "Design to Test". The main theme of the 11th meeting is "Design, fabrication, and test of heterogeneous systems", and we plan various topics on "heterogeneous" technology inlcuding bio applications. and their design, fabrication, and test.
Professor Anthony Walton of Edinburgh University and Professor Tim Cheng of Hong Kong University of Science and Technology are goint to give lectures on their recent research topics. Professor Krishnendu Chakrabarty from Duke University and Professor Stewart Smith from Edinburgh University will give lectures, too, as Visiting Professors at VDEC, The University of Tokyo.
We look forward to all of your participation in the symposium.


Symposium Program (日本語版, Japanese version)

10:00 Opening remarks
10:15 Session 1 - Special talks by visiting professors at ADVANTEST D2T Research Division in VDEC
"Design and Test of Micro-Electrode-Dot-Array (MEDA) Digital Microfluidic Biochips"
Krishnendu Chakrabarty (Duke University & VDEC, The University of Tokyo)
"IMPACT - Implantable Microsystems for Personalised Anti Cancer Therapy"
Stewart Smith (Edinburgh University & VDEC, The University of Tokyo)
11:35 Lobby exhibition overview
11:45 Lunch break
13:15 Session 2 - Research Activity of ADVANTEST D2T Research Division in VDEC
Experimental Demonstration of Cancelling Systematic Variation for free-Calibration Stochastic ADC
Nguyen Ngoc Mai Khanh (The University of Tokyo)
A new method for measuring alias-free aperture jitter in an ADC output
Takahiro J. Yamaguchi (Advantest Laboratories Ltd.),
Power Supply Impedance Emulation Technique for ATE Device Power Supply
Masahiro Ishida (Advantest Corporation)
High-throughput and high-accuracy electron-beam direct writing
Rimon Ikeno (The University of Tokyo)
14:45 Coffee break
15:15 Session 3 - Invited talks
"Options for the integration of technologies with CMOS Integrated Circuits"
Anthony Walton (Edinburgh University)
"3D Integrated CMOS-Memristor Hybrid Circuits: Devices, Integration, Architecture, and Applications"
Kwang-Ting (Tim) Cheng (Hong Kong University of Science and Technology)
16:35 Short break
16:45 Panel Discussion
"Breakthrough technology and application of heterogeneous micro/nano systems for industrial/economic success"
Moderator:
Hiroyuki Fujita (Institute of Industrial Science, The University of Tokyo)
Panelists:
Anthony Walton (Edinburgh University)
Kwang-Ting (Tim) Cheng (Hong Kong University of Science and Technology)
Krishnendu Chakrabarty (Duke University & VDEC, The University of Tokyo)
Stewart Smith (Edinburgh University & VDEC, The University of Tokyo)
18:00 Closing remarks
Reception

Registration (free of charge)

This symposium is over. Thank you.


Access to the Symposium

Please look at the MAP.


Contact

ADVANTEST D2T Research Divison,
VLSI Design and Education Center (VDEC), The University of Tokyo
Room 404, Takeda Building, Yayoi 2-11-16, Bunkyo-ku, Tokyo, 113-0032, Japan
Tel: +81-3-5841-0233 FAX: +81-3-5841-1093
E-mail: ikeno[at]vdec.u-tokyo.ac.jp


VLSI Design and Education Center (VDEC), The University of Tokyo