The 12th VDEC D2T Symposium, The University of Tokyo

September 28th (Thu.), 2017
Takeda Hall, 5th floor of Takeda Building, The University of Tokyo

(日本語版, Japanese page)

News：

- Symposium homepage was opened. (2017/6/12)
- Symposium program was released. (2017/6/29)
- Registration started. (2017/7/3)
- Symposium poster image file was uploaded. (2017/7/24)
- Abstracts of the presentations were linked. (2017/8/1)
- This symposium is over. Thank you. (2017/9/28)

Symposium Overview

Organizer	VLSI Design and Education Center (VDEC), The University of Tokyo
Sponsor	ADVANTEST Corporation
Supporters	The Institute of Electronics, Information and Communication Engineers (IEICE) Information Processing Society of japan (IPSJ) IEEE SSCS Japan Chapter IEEE SSCS Kansai Chapter The Study Group of the integrated MEMS, JSAP The Institute of NANO Testing (INANOT) Japan Electronics and Information Technology Industries Association (JEITA) Semiconducto Equipment Association in Japan (SEAJ) SEMI Japan Power Device Enabling Association (PDEA)
Admission fee	Not required

From the organizer:

"D2T Symposium" will be held on 28th September, 2017, as 12th meeting of symposium series first started in 2008. We have been pursuing in "design", "test", and their bridging technologies in the symposia as indicated in the name "D2T" that means "Design to Test".
This year, we will invite four lecturers overseas for their distinguished research topics related to IoT and data analytics; Prof. Kwang-Ting (Tim) Cheng from Hong Kong University of Science and Technology, Prof. Shawn Blanton from Carnegie Mellon University, Prof. Wolfgang Kunz and Prof. Dominik Stoffel from Technische Universitat Kaiserslautern. We will also have special lectures from Prof. Shin-ichi Takagi and Prof. Hiroyuki Morikawa from the University of Tokyo.
We look forward to all of your participation in the symposium.

Symposium Program (日本語版, Japanese version)

10:00	Opening remarks
10:30	Session 1 - Special lectures
	"Advanced MOS device technology for ultra-low power IoT applications" Shinichi Takagi (The University of Tokyo)
	"Going Digital: Transformation of Society, Industry, and Life" Hiroyuki Morikawa (The University of Tokyo)
12:00	Lunch break
13:15	Session 2 - Research Activity in ADVANTEST D2T Research Division
	"Power Supply Impedance Emulation to Eliminate Overkills and Underkills due to the Impedance Difference between ATE and Customer Board" Toru Nakura (The University of Tokyo)
	"Common Pitfalls in Application of a Threshold Detection Comparator to a Continuous-Time Level Crossing Quantization" Takahiro J. Yamaguchi (Advantest Laboratories Ltd.)
14:05	Short break
14:15	Session 3 - Invited lectures
	"Variation and Failure Characterization Through Test Data Analytics" Kwang Ting Cheng (Hong Kong University of Science and Technology)
	"Test-Chip Design for Yield Learning at the 7nm Technology Node" Shawn Blanton (Carnegie Mellon University)
15:45	Coffee break
16:15	Session 3 - Invited lectures
	"Rethinking Design in the IoT Era - How Formal Methods Help to Meet the Challenges" Wolfgang Kunz (Technische Universitat Kaiserslautern)
	"Software in a Hardware View: New Models for Firmware Development and Safety Analysis in IoT Systems" Dominik Stoffel (Technische Universitat Kaiserslautern)
17:45	Closing
18:00	Reception

Registration (free of charge）

This symposium is over. Thank you.

Access to the Symposium

Please look at the MAP.

D2T Symposium history

Past D2T Symposium pages

Contact

ADVANTEST D2T Research Divison,
VLSI Design and Education Center (VDEC), The University of Tokyo
Room 404, Takeda Building, Yayoi 2-11-16, Bunkyo-ku, Tokyo, 113-0032, Japan
Tel: +81-3-5841-0233 FAX: +81-3-5841-1093
E-mail: ikeno[at]vdec.u-tokyo.ac.jp

VLSI Design and Education Center (VDEC), The University of Tokyo